Tech Xplore

A hardware-software co-design can efficiently run AI on edge devices

A new hardware-software co-design increases AI energy efficiency and reduces latency, enabling real-time processing of ...
Business Insider

JPMorgan software developers have new objectives: use AI or fall behind

JPMorgan software developers say the bank is raising its expectations for AI use. Internal company communications reveal the bank's new AI targets. The updated objectives affect members of its global ...
IEEE

TEMP: A Memory Efficient Physical-Aware Tensor Partition-Mapping Framework on Wafer-Scale Chips

Abstract: Large language models (LLMs) demand significant memory and computation resources. Wafer-scale chips (WSCs) provide high computation power and die-to-die (D2D) bandwidth but face a unique ...
IEEE

A Wiener-Like Analog Predistorter With Improved Memory Effect Based on Periodic Slow Wave Structure

Abstract: This letter introduces the Wiener model from digital predistortion (DPD) into the design of analog predistorter (APD), proposing a novel Wiener-liked APD based on a periodic slow wave ...