I usually love articles by Jim, they show clear thinking and deep knowledge. In this case, I think he ventured in a field a bit outside his comfort zone. Being directly involved in the development of ...

A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat ...

A new technical paper titled “Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs” was published by researchers at Georgia Tech, California Polytechnic State University-San Luis Obispo.

The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...

Company hopes to match or even exceed x86 and Arm performance for data center infrastructure and applications. The data center is becoming more heterogeneous in terms of customized processors, ...

DeepComputing has developed a reputation as a pioneer of small form factor RISC-V PCs, being the first company to bring a ...

OpenHW Group, a leading player in the open-source hardware community, has recently unveiled its comprehensive Development Kit for an open-source RISC-V Microcontroller Unit (MCU), known as the OpenHW ...

TOKYO--(BUSINESS WIRE)--Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, today announced the industry’s first general-purpose 32-bit RISC-V-based ...

Over the holiday break, the footage from the recent “RISC-V Summit” was posted for the world to see, and would you believe that Google showed up to profess its love for the up-and-coming CPU ...