Hackaday

VexRiscv: A Modular RISC-V Implementation For FPGA

Since an FPGA is just a sea of digital logic components on a chip, it isn’t uncommon to build a CPU using at least part of the FPGA’s circuitry. VexRiscv is an implementation of the RISC-V CPU ...
Electronics Weekly

Digi-Key to host RVfpga Webinar on RISC-V architecture and implementation

Digi-Key has announced it will host a RVfpga webinar, in collaboration with Imagination Technologies, on the topic of understanding RISC-V architecture and implementation on an FPGA. Running on ...
Business Wire

Bluespec Launches New MCUX RISC-V Processor That Enables Developers to Implement Custom Instructions and Add Accelerators

FRAMINGHAM, Mass.--(BUSINESS WIRE)--Bluespec Inc. today announced its new MCUX RISC-V processor that makes it easy for developers to implement custom instructions and add accelerators to FPGAs and ...
EDN

Customizable RISC-V processor is vendor-independent

Bluespec’s MCUX RISC-V processor allows developers to implement custom instructions and add accelerators to FPGAs and ASICs. MCUX joins the company’s MCU RISC-V family of processors designed for ultra ...
Semiconductor Engineering

RISC-V Targets Data Centers

RISC-V vendors are beginning to aim much higher in the compute hierarchy, targeting data centers and supercomputers rather than just simple embedded applications on the edge. In the past, this would ...
Electronic Design

Adding Soft-Core RISC-V to FPGAs Improves Programmability

Advantages of using a soft-core RISC-V processor. The type of performance you can expect from using a soft-core RISC-V processor on the Speedster 7t. A full list of configurable features available on ...
Nasdaq

The Industry’s First SoC FPGA Development Kit Based on the RISC-V Instruction Set Architecture is Now Available

Microchip’s PolarFire® SoC FPGA Icicle Kit enables the broad RISC-V-based Mi-V ecosystem for the industry’s lowest-power FPGA CHANDLER, Ariz., Sept. 16, 2020 (GLOBE NEWSWIRE) -- The rising adoption of ...
EDN

Implementing floating-point DSP on FPGAs

For developers using FPGAs for the implementation of floating-point DSP functions, one key challenge is how to decompose the computation algorithm into sequences of parallel hardware processes while ...
Hackaday

RISC-V CPU Gets A Peripheral

One of the ways people use FPGAs is to have part of the FPGA fabric hold a CPU. That makes sense because CPUs are good at some jobs that are hard to do with an FPGA, and vice versa. Now that the ...
Business Wire

Lattice Announces Training Webinar Focused on Low Power, FPGA-based RISC-V Embedded System Design Using Lattice Propel Design Environment

HILLSBORO, Ore.--(BUSINESS WIRE)--Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced an upcoming webinar on how a RISC-V embedded system can be ...
Electronic Design

11 Myths About the RISC-V ISA

Many companies today are exploring free, open-source hardware and software as an alternative to closed, costly instruction set architectures (ISAs). RISC-V is a free, open, and extensible ISA that’s ...