SEALSQ and Lattice Collaborate to Deliver Unified TPM-FPGA Architecture for Post-Quantum Security

By combining Lattice’s expertise in low power programmable FPGAs and recognized leadership in security with SEALSQ's specialized post-quantum capabilities, this collaboration demonstrates technical ...
DATAQUEST

NanoXplore and STMicroelectronics deliver European FPGA for space missions

The product's advanced digital capability enables European customers to develop higher performance, more competitive ...
Hackaday

Does The World Need An FPGA Arduino?

What would you get it you mashed up an FPGA and an Arduino? An FPGA development board with far too few output pins? Or a board in the form-factor of Arduino that’s impossible to program? The Alhambra ...

BrainChip Announces Immediate Availability of Akida™ Pico for Remote Evaluation via FPGA Cloud

Akida FPGA Cloud service provides a pre-configured environment where designers can upload their models—created using standard frameworks like TensorFlow/Keras and PyTorch via the MetaTF™ software flow ...
New Electronics

BrainChip opens remote access to Akida Pico through FPGA cloud platform

BrainChip makes its ultra‑low‑power Akida Pico AI co‑processor available for remote evaluation via its cloud platform.
Hackaday

How To Add UART To Your FPGA Projects

Being able to communicate between a host computer and a project is often a key requirement, and for FPGA projects that is easily done by adding a submodule like a UART. A Universal Asynchronous ...
Forbes

Microsoft: FPGA Wins Versus Google TPUs For AI

At the recent Hot Chips conference, three of the world’s largest datacenter companies detailed projects that exploit Field Programmable Gate Arrays (FPGAs) as accelerators for performance-hungry ...
The Next Platform

Altera Is Being Realistic About FPGA Compute In The Datacenter

Like many a decade ago, we were enthusiastic about the prospect of triple-hybrid systems in the datacenter. We were convinced that there was a place for CPUs, for GPUs, and for FPGAs in complex and ...
EDN

Building an FPGA FIFO without using logic resources

Today, FPGA designers are using these flexible devices to perform everything from simple glue logic tasks to implementing complicated system on a chip (SoC) functions. The efficiency and ease of ...
EDN

Resets in FPGA & ASIC control and data paths

Reset is an important mechanism to bring a digital system into a known state. The need for reset is governed by the system design and application, and various data and control paths are designed to ...
The Robot Report

AMD expands midrange FPGA offerings with Kintex UltraScale+ Gen 2 family

AMD engineered the Kintex UltraScale+ Gen 2 FPGAs to meet the increasingly complex system requirements across industrial and ...
SlashGear

What Is FPGA Gaming?

Emulating video game consoles via software has been a popular way to enjoy retro gaming for some time now. Software emulation of consoles works by convincing a ROM (or read-only memory, copied from a ...