J-LINK REDUCES JTAG DEBUG PINCOUNT FROM 5 to 1! Pittsford, New York—Traditional JTAG boundary-scan testing normally takes up 5 valuable pins on an i.c., requires 5 resistors, and increases chip power.

Recently I started to evaluate a development kit that cost about $US 180. Taking the kit beyond a basic demonstration, though, required using a “JTAG” programming ...

Anyone who enjoys building electronic projects may find the new IDAP-Link debug JTag Probe created by I-SYST worth more investigation, as well as helpful building electronic projects. The small ...

Electronic enthusiasts and Raspberry Pi users may be interested in a new JTAG debugger board called Tap-Hat which has been created by the team at eCosCentric. The TAP-HAT has been designed to provide ...

Tap-Hat is a multi-purpose JTAG debugger board for those developing software to run on Raspberry Pi: RTOSs, Linux and bare-metal code in particular. Photo of prototype As well as this, the board can ...

JTAG debuggers tend to be large, fast, and expensive, or cheap and slow. The new crop of USB-based JTAG debuggers is cutting the cost while keeping the performance high. I recently had a chance to ...

Multi-core technology delivers significant advantages to hardware and software developers by providing higher processor performance, more effective power usage, and a smaller physical footprint for ...

The PowerPC started out as a RISC challenger to the PC's XC86, developed by Apple, IBM, and Motorola. It lost that race, but it has become a major RISC for ICs, ASSPs, and cores. PowerPCs have a large ...

Technology people are generally familiar with the Open SystemsInterconnection model for computer networks and protocols, oftenreferred to as the OSIReference Model (ISO 7498)[1].The Basic Reference ...